FIGS. 1 and 2 show respective prior art circuits 10 and 20 that implement conventional techniques for suppressing noise in current source arrays. Circuits 10 and 20 are typically used in a digital-to-analog converter (DAC). Circuits 10 and 20 include multiple current sources that include junction field effect transistors Q.sub.0, Q.sub.1, Q.sub.2, Q.sub.3, . . . , Q.sub.n, respectively, where the number of current sources is n+1. The sizes of the gate widths of transistors Q.sub.0, Q.sub.1, Q.sub.2, Q.sub.3, . . . , Q.sub.n, are w, k.sub.1 w, k.sub.2 w, k.sub.3 w, . . . k.sub.n w, respectively. The gates of transistors Q.sub.0, Q.sub.1, Q.sub.2, Q.sub.3, . . . , Q.sub.n are connected to the output V.sub.ctrl of an operational amplifier 12.
The sources of transistors Q.sub.0, Q.sub.1, Q.sub.2, Q.sub.3, . . . , Q.sub.n are connected to respective source degeneration resistors R, R/k.sub.1, R/k.sub.2, R/k.sub.3, . . . , R/k.sub.n, which are connected to a bias voltage source, V.sub.ss. The currents flowing into the drains of transistors Q.sub.0, Q.sub.1, Q.sub.2, Q.sub.3, . . . , Q.sub.n are I.sub.o, k.sub.1 I.sub.o, k.sub.2 I.sub.o, k.sub.3 I.sub.o, . . . , k.sub.n I.sub.o, respectively. In a DAC, the typical values of the weighting factors are k.sub.1 =2, k.sub.2 =4, k.sub.3 =8, . . . k.sub.n =2.sup.n.
Circuits 10 and 20 differ from each other in that circuit 10 detects the value of the current by sensing the voltage across the source resistor R and circuit 20 detects the value of the current by sensing voltage across a load resistor R.sub.L. In circuit 10, the negative input to operational amplifier 12 is connected to the source of Q.sub.0. In circuit 20, the positive input of operational amplifier 12 is connected to the drain of Q.sub.0.
The values of the currents I.sub.o, k.sub.1 I.sub.o, k.sub.2 I.sub.o, k.sub.3 I.sub.o, . . . , k.sub.n I.sub.o for transistors Q.sub.0, Q.sub.1, Q.sub.2, Q.sub.3, . . . , Q.sub.n in circuits 10 and 20 are set by three factors: (1) the voltage difference between V.sub.ctrl and V.sub.ss, (2) the gate widths, and (3) the inverse ratios of source degeneration resistors.
The value of V.sub.ctrl is controlled by a negative feedback loop, which is associated with operational amplifier 12, that senses a feedback voltage that is directly proportional to a reference current I.sub.o, and compares that voltage with a reference voltage V.sub.ref. In circuit 10, the feedback voltage is generated from the voltage drop across source degeneration resistor R that is connected to transistor Q.sub.0. In circuit 20, the feedback voltage is generated from the output current of transistors Q.sub.0 flowing through load resistor R.sub.L.
In both circuit 10 and circuit 20, however, the current produced by only one of the current sources is sensed and, ultimately, controlled. All of the remaining current sources are slaved to the controlled current source but are outside of the control loop. Under ideal conditions this would not be a problem.
Under real conditions, however, noise currents and/or current drift will cause instantaneous and random deviations in the relative magnitudes of the currents k.sub.1 I.sub.o, k.sub.2 I.sub.o, k.sub.3 I.sub.o, . . . , k.sub.n I.sub.o which are outside of the feedback loop, and which thus can neither be sensed nor corrected for. In addition, the noise in the loop control path (Q.sub.0, R) which is compensated by the loop is amplified by the current sources outside of the loop. Therefore, as V.sub.ctrl varies to compensate for the noise in the reference source, the currents of all of the other sources are modulated in like fashion, which can lead to a net increase in noise.
There is a need, therefore, for a controller of a group of current sources that reduces the overall output noise of the group of current sources.